arm64: dts: freescale: sl28: var1: fix RGMII clock and voltage
authorMichael Walle <michael@walle.cc>
Fri, 14 May 2021 18:55:53 +0000 (20:55 +0200)
committerShawn Guo <shawnguo@kernel.org>
Sun, 23 May 2021 05:07:57 +0000 (13:07 +0800)
commit52387bb9a4a75b88887383cb91d3995ae6f4044a
treec35e04bc4ccad52da789f3502a5c52743d8e3dad
parent25201269c6ec3e9398426962ccdd55428261f7d0
arm64: dts: freescale: sl28: var1: fix RGMII clock and voltage

During hardware validation it was noticed that the clock isn't
continuously enabled when there is no link. This is because the 125MHz
clock is derived from the internal PLL which seems to go into some kind
of power-down mode every once in a while. The LS1028A expects a contiuous
clock. Thus enable the PLL all the time.

Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is
the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO
regulator.

This fix is for the freescale/fsl-ls1028a-kontron-sl28-var1.dts.

Fixes: 642856097c18 ("arm64: dts: freescale: sl28: add variant 1")
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts