Fix PR15155: lost vadd/vsplat optimization.
authorBill Schmidt <wschmidt@linux.vnet.ibm.com>
Wed, 20 Feb 2013 15:50:31 +0000 (15:50 +0000)
committerBill Schmidt <wschmidt@linux.vnet.ibm.com>
Wed, 20 Feb 2013 15:50:31 +0000 (15:50 +0000)
commit51e7951e24c506de1767419ccb3e05d979029f62
treeb0e7134afb7fe19a0e1cfbc893353a86e8b68f3f
parent70b01558f18c7b02e1c0169cc9aabcbc5e05edc4
Fix PR15155: lost vadd/vsplat optimization.

During lowering of a BUILD_VECTOR, we look for opportunities to use a
vector splat.  When the splatted value fits in 5 signed bits, a single
splat does the job.  When it doesn't fit in 5 bits but does fit in 6,
and is an even value, we can splat on half the value and add the result
to itself.

This last optimization hasn't been working recently because of improved
constant folding.  To circumvent this, create a pseudo VADD_SPLAT that
can be expanded during instruction selection.

llvm-svn: 175632
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/test/CodeGen/PowerPC/vaddsplat.ll [new file with mode: 0644]