drm/msm/a6xx: add build_bw_table for A640/A650
authorJonathan Marek <jonathan@marek.ca>
Wed, 1 Jul 2020 03:09:57 +0000 (23:09 -0400)
committerRob Clark <robdclark@chromium.org>
Fri, 31 Jul 2020 13:46:16 +0000 (06:46 -0700)
commit51dd427192ac47e7d075b562e386963cb7aabcfa
tree88d3b4781a9cc5b50a2cf28ead648e639deb6cd9
parent142639a52a01e90c512a9a8d2156997e02a65b53
drm/msm/a6xx: add build_bw_table for A640/A650

This sets up bw tables for A640/A650 similar to A618/A630, 0 DDR bandwidth
vote, and the CNOC vote. A640 has the same CNOC addresses as A630 and was
working, but this is required for A650 to work.

Eventually the bw table should be filled by querying the interconnect
driver for each BW in the dts, but use these dummy tables for now.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/adreno/a6xx_hfi.c