review.tizen.org Git - platform/upstream/mesa.git/commit

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author	Alyssa Rosenzweig <alyssa@rosenzweig.io>
	Fri, 28 Jul 2023 19:08:00 +0000 (15:08 -0400)
committer	Marge Bot <emma+marge@anholt.net>
	Tue, 1 Aug 2023 23:18:29 +0000 (23:18 +0000)
commit	51db19f7a28458bd46574001765d957c4bbd6a30
tree	f6a0c4751d6a3eed19828532239590a866122eed	tree \| snapshot
parent	04159a2973ddf48ecbb6317b1bfa84805837d6b6	commit \| diff

nir: Rename scoped_barrier -> barrier

sed + ninja clang-format + fix up spacing for common code.

If you are unhappy that I did not manually change the whitespace of your driver,
you need to enable clang-format for it so the formatting would happen
automatically.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24428>

47 files changed:

src/amd/common/ac_nir.c		diff \| blob \| history
src/amd/common/ac_nir_lower_ngg.c		diff \| blob \| history
src/amd/common/ac_nir_lower_taskmesh_io_to_mem.c		diff \| blob \| history
src/amd/common/ac_nir_lower_tess_io_to_mem.c		diff \| blob \| history
src/amd/compiler/aco_instruction_selection.cpp		diff \| blob \| history
src/amd/llvm/ac_nir_to_llvm.c		diff \| blob \| history
src/amd/vulkan/meta/radv_meta_decompress.c		diff \| blob \| history
src/amd/vulkan/meta/radv_meta_fast_clear.c		diff \| blob \| history
src/asahi/compiler/agx_compile.c		diff \| blob \| history
src/broadcom/compiler/nir_to_vir.c		diff \| blob \| history
src/compiler/glsl/glsl_to_nir.cpp		diff \| blob \| history
src/compiler/nir/nir_builder.h		diff \| blob \| history
src/compiler/nir/nir_gather_info.c		diff \| blob \| history
src/compiler/nir/nir_intrinsics.py		diff \| blob \| history
src/compiler/nir/nir_lower_memory_model.c		diff \| blob \| history
src/compiler/nir/nir_lower_task_shader.c		diff \| blob \| history
src/compiler/nir/nir_lower_variable_initializers.c		diff \| blob \| history
src/compiler/nir/nir_opt_barriers.c		diff \| blob \| history
src/compiler/nir/nir_opt_combine_stores.c		diff \| blob \| history
src/compiler/nir/nir_opt_copy_prop_vars.c		diff \| blob \| history
src/compiler/nir/nir_opt_dead_write_vars.c		diff \| blob \| history
src/compiler/nir/nir_opt_load_store_vectorize.c		diff \| blob \| history
src/compiler/nir/nir_schedule.c		diff \| blob \| history
src/compiler/nir/tests/load_store_vectorizer_tests.cpp		diff \| blob \| history
src/compiler/spirv/spirv_to_nir.c		diff \| blob \| history
src/compiler/spirv/tests/avail_vis.cpp		diff \| blob \| history
src/compiler/spirv/vtn_opencl.c		diff \| blob \| history
src/freedreno/ir3/ir3_compiler_nir.c		diff \| blob \| history
src/gallium/auxiliary/gallivm/lp_bld_nir.c		diff \| blob \| history
src/gallium/auxiliary/nir/nir_to_tgsi.c		diff \| blob \| history
src/gallium/auxiliary/nir/tgsi_to_nir.c		diff \| blob \| history
src/gallium/drivers/r600/sfn/sfn_shader.cpp		diff \| blob \| history
src/gallium/drivers/r600/sfn/sfn_shader.h		diff \| blob \| history
src/gallium/drivers/radeonsi/si_shader_info.c		diff \| blob \| history
src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c		diff \| blob \| history
src/gallium/frontends/lavapipe/lvp_pipeline.c		diff \| blob \| history
src/intel/compiler/brw_fs_nir.cpp		diff \| blob \| history
src/intel/compiler/brw_mesh.cpp		diff \| blob \| history
src/intel/compiler/brw_vec4_nir.cpp		diff \| blob \| history
src/intel/compiler/brw_vec4_tcs.cpp		diff \| blob \| history
src/intel/vulkan/anv_mesh_perprim_wa.c		diff \| blob \| history
src/microsoft/compiler/dxil_nir.c		diff \| blob \| history
src/microsoft/compiler/dxil_nir_tess.c		diff \| blob \| history
src/microsoft/compiler/nir_to_dxil.c		diff \| blob \| history
src/nouveau/codegen/nv50_ir_from_nir.cpp		diff \| blob \| history
src/panfrost/compiler/bifrost_compile.c		diff \| blob \| history
src/panfrost/midgard/midgard_compile.c		diff \| blob \| history

Domain: Graphics System / GL;

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