[AArch64][PATCH 2/14] Support ARMv8.2 FP16 Vector Three Same instructions.
authorMatthew Wahab <matthew.wahab@arm.com>
Mon, 14 Dec 2015 16:44:02 +0000 (16:44 +0000)
committerMatthew Wahab <matthew.wahab@arm.com>
Mon, 14 Dec 2015 16:44:02 +0000 (16:44 +0000)
commit51d543ed936c9ea7d045ecf80030e6bc8ffff29f
tree5f5c64cd2166af9f7946c3cafab52b1d57316845
parent40d16a76c781bc9951d22ee359e07c6c240b81ba
[AArch64][PATCH 2/14] Support ARMv8.2 FP16 Vector Three Same instructions.

ARMv8.2 adds 16-bit floating point operations as an optional extension
to floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Vector Three Register Same, making them
available when +simd+fp16 is enabled.

The instructions added are: FMAXNM, FMAXNMP, FNMINNM, FMINNMP, FMLA,
FMLS, FADD, FADDP, FSUB, FABD, FMULX, FMUL, FCMEQ, FCMGE, FCMGT, FACGE,
FACGT, FMAX, FMAXP, FMIN, FMINP, FRECPS, FDIV and FRSQRTS.

The general form for these instructions is
  <OP> <Vd>.<T>, <Vs>.<T>, <Vm>.<T>
  where T is 4h or 8h.

gas/testsuite/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

* gas/aarch64/advsimd-fp16.d: New.
* gas/aarch64/advsimd-fp16.s: New.

opcodes/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (QL_V3SAMEH): New.
(aarch64_opcode_table): Add fp16 versions of fmaxnm, fmla, fadd,
fmulx, fcmeq, fmax, frecps, fminnm, fmls, fsub, fmin, frsqrts,
fmaxnmp, faddp, fmul, fcmge, facge, fmaxp, fdiv, fminnmp, fabd,
fcmgt, facgt and fminp to the vector three same group.

Change-Id: I3f1c5fe82ca73f7a17fe5329cf2b0de03c94328c
gas/testsuite/ChangeLog
gas/testsuite/gas/aarch64/advsimd-fp16.d [new file with mode: 0644]
gas/testsuite/gas/aarch64/advsimd-fp16.s [new file with mode: 0644]
opcodes/ChangeLog
opcodes/aarch64-asm-2.c
opcodes/aarch64-dis-2.c
opcodes/aarch64-opc-2.c
opcodes/aarch64-tbl.h