drm/i915: Fix BXT lane latency optimal setting with MST
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 27 Oct 2017 13:43:48 +0000 (16:43 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 27 Oct 2017 19:14:37 +0000 (22:14 +0300)
commit5161d058dff4d53c78a046350d64beff54e9a9f7
treec07321569a956dcbff1f64944a72cfa0f2c03b8e
parent742745f1ee4f5a36e5cc5e8b360b519df45efa89
drm/i915: Fix BXT lane latency optimal setting with MST

Call the DDI .pre_pll_enable() hook from the MST code so that BXT gets
the correct lane latency optimal setting applied. And we obviously need
to compute the correct value, and read it out to keep the state checker
happy.

While at it drop the useless 'encoder' parameter to
bxt_ddi_phy_calc_lane_lat_optim_mask()

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171027134348.31190-1-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_dp_mst.c
drivers/gpu/drm/i915/intel_dpio_phy.c