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(parent: 456f716) | patch
spi: aspeed: Support AST2400 platform
authorChin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Fri, 19 Aug 2022 09:01:06 +0000 (17:01 +0800)
committerTom Rini <trini@konsulko.com>
Tue, 13 Sep 2022 16:08:40 +0000 (12:08 -0400)
commit5150e908f54c3bd0fdd30eefdffaf49c826881ba
tree959e98d8fe96e213712cc4c6ddeb0f301e531b63tree | snapshot
parent456f716f36578bcb86596b73750aa55d5851b4decommit | diff
spi: aspeed: Support AST2400 platform

Although AST2400 is EOL officially, in order to achieve
sustainability and completeness, AST2400 part is added.

For AST2400,
- Five CSs are supported by FMC controller.
- SPI1 controller only supports single CS and there is
  no address segment address register. The CE control
  register of SPI1 is located at the offset 0x04 and
  the 4-byte address mode control bit is bit 13 of
  this register.

Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
drivers/spi/spi-aspeed-smc.c diff | blob | history
Domain: System / Kernel;