Correct negs aliasing on AArch64.
authorTamar Christina <tamar.christina@arm.com>
Fri, 22 Jun 2018 11:27:53 +0000 (12:27 +0100)
committerTamar Christina <tamar.christina@arm.com>
Fri, 22 Jun 2018 11:32:19 +0000 (12:32 +0100)
commit514cd3a0f589fa48ca7bc9504c36436c0cbefcb2
tree560f31954190dcc24cfcaadb07dfd9d90e070883
parentbfd60e344c8001910825a358ad674003738ebb6b
Correct negs aliasing on AArch64.

This patch fixes a disassembly issue with the aliases to subs with a shifted
register.  The subs instruction with the zero register as destination is
supposed to alias to cmp and when the first input register is the zero register
the subs is supposed to be aliased to negs.

This means that a subs with destination and first input registers the zero
register is supposed to be a cmp.

This is done by raising the priority of the cmp alias.

opcodes/

* aarch64-tbl.h (aarch64_opcode_table): Fix alias flag for negs
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.

gas/

* testsuite/gas/aarch64/addsub.s: Add negs to zero reg test.
* testsuite/gas/aarch64/addsub.d: Likewise.
gas/ChangeLog
gas/testsuite/gas/aarch64/addsub.d
gas/testsuite/gas/aarch64/addsub.s
opcodes/ChangeLog
opcodes/aarch64-asm-2.c
opcodes/aarch64-dis-2.c
opcodes/aarch64-tbl.h