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(parent: c4d00da) | patch
i965: Always set depth/stencil write enables on gen7+
authorJason Ekstrand <jason.ekstrand@intel.com>
Mon, 7 May 2018 17:57:49 +0000 (10:57 -0700)
committerJason Ekstrand <jason.ekstrand@intel.com>
Tue, 8 May 2018 15:27:43 +0000 (08:27 -0700)
commit514bb6f41ec139baeaf56b57d7bc1034fb114234
tree53cdcf490e82c010c15518510d52a4bf94c10346tree | snapshot
parentc4d00da7b7b819e21d07e00cdb9b14f670c8e262commit | diff
i965: Always set depth/stencil write enables on gen7+

The hardware will AND these fields with the corresponding fields in
DEPTH_STENCIL_STATE so there's no real reason to toggle them on and off
based on state bits.  This removes our reliance on the _NEW_DEPTH and
_NEW_STENCIL state bits and better matches what ISL does.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/gen7_misc_state.c diff | blob | history
src/mesa/drivers/dri/i965/gen8_depth_state.c diff | blob | history
Domain: Graphics System / GL;