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(parent: c9ba6cf) | patch
drm/vc4: Increase the core clock based on HVS load
authorMaxime Ripard <maxime@cerno.tech>
Wed, 26 May 2021 14:13:02 +0000 (16:13 +0200)
committerPhil Elwell <8911409+pelwell@users.noreply.github.com>
Fri, 9 Jul 2021 16:48:50 +0000 (17:48 +0100)
commit5146eb7b0878d80009e2b27c47a668316683ef7e
tree1eb1c65a58a2db2d1c3ff3192ac1a96a91538e35tree | snapshot
parentc9ba6cf8858b22fad16ddfe261a90181c4f9a504commit | diff
drm/vc4: Increase the core clock based on HVS load

Depending on a given HVS output (HVS to PixelValves) and input (planes
attached to a channel) load, the HVS needs for the core clock to be
raised above its boot time default.

Failing to do so will result in a vblank timeout and a stalled display
pipeline.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
drivers/gpu/drm/vc4/vc4_crtc.c diff | blob | history
drivers/gpu/drm/vc4/vc4_drv.h diff | blob | history
drivers/gpu/drm/vc4/vc4_kms.c diff | blob | history
Domain: System / Kernel;