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[NVPTX] Make sure we do not generate MULWIDE ISD nodes when optimizations are disabled
authorJustin Holewinski <jholewinski@nvidia.com>
Wed, 23 Jul 2014 17:40:45 +0000 (17:40 +0000)
committerJustin Holewinski <jholewinski@nvidia.com>
Wed, 23 Jul 2014 17:40:45 +0000 (17:40 +0000)
commit511664dc7677cd45dc1e6f62e49a1fb0c7db0b11
tree1ded59d9f49c3e5ee23bee23f1c8948430d4fd03tree | snapshot
parente6b4ba1c41f35fccdd9dac4967cdd9bbc2074fb9commit | diff
[NVPTX] Make sure we do not generate MULWIDE ISD nodes when optimizations are disabled

With optimizations disabled, we disable the isel patterns for mul.wide; but we
were still generating MULWIDE ISD nodes.  Now, we only try to generate MULWIDE
ISD nodes in DAGCombine if the optimization level is not zero.

llvm-svn: 213773
llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp diff | blob | history
llvm/test/CodeGen/NVPTX/mulwide.ll diff | blob | history
Domain: System / Toolchain;