UART: setting clk81 gate and clock source by dts
authorQi Duan <qi.duan@amlogic.com>
Thu, 29 Jun 2017 06:55:15 +0000 (14:55 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Thu, 29 Jun 2017 10:26:54 +0000 (03:26 -0700)
commit51153256b05cfb1bc93c518f51de7c3960188fa0
treef08ca51a78814e7c44d0633ad68f1b76f984c8e2
parent2008f7e1df056c037757e07f27298569ee229b6b
UART: setting clk81 gate and clock source by dts

PD#146725: UART: setting clk81 gate and clock source by dts [1/1]

Change-Id: I5d1bacb9d59db250372100fc93263b1f0412027f
Signed-off-by: Qi Duan <qi.duan@amlogic.com>
arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts
arch/arm64/boot/dts/amlogic/axg_s400.dts
arch/arm64/boot/dts/amlogic/axg_s420.dts
drivers/amlogic/uart/meson_uart.c