KVM/MIPS32: Binary patching of select privileged instructions.
authorSanjay Lal <sanjayl@kymasys.com>
Thu, 22 Nov 2012 02:34:16 +0000 (18:34 -0800)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 9 May 2013 15:48:22 +0000 (17:48 +0200)
commit50c8308538dc9671490d6cb65259ef0ed79f5d13
tree28bcef62cbb0c839d3d94513f65adc31698ebb5f
parent2f4d9b5442766ec9ae5c2b217badfd9de320e1ea
KVM/MIPS32: Binary patching of select privileged instructions.

Currently, the following instructions are translated:
- CACHE (indexed)
- CACHE (va based): translated to a SYNCI, overkill on D-CACHE operations,
  but still much faster than a trap.
- mfc0/mtc0: the virtual COP0 registers for the guest are implemented as
  2-D array.
  [COP#][SEL] and this is mapped into the guest kernel address space @ VA 0x0.
  mfc0/mtc0 operations are transformed to load/stores.

Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kvm/kvm_mips_comm.h [new file with mode: 0644]
arch/mips/kvm/kvm_mips_commpage.c [new file with mode: 0644]
arch/mips/kvm/kvm_mips_dyntrans.c [new file with mode: 0644]