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(parent: 3ad8a20) | patch
drm/i915: clear DPLL reg when disabling i9xx dplls
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 5 Jun 2013 11:34:33 +0000 (13:34 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 12 Jul 2013 16:54:02 +0000 (18:54 +0200)
commit50b44a449ff1a19712ebc36ffccf9ac0a68033bf
treef8a6e26f0f824b7212838bdfa31d5e31b1565459tree | snapshot
parent3ad8a208abbe1bdfe31512053a81ac4938aed447commit | diff
drm/i915: clear DPLL reg when disabling i9xx dplls

Toghether with the hw state readout this should catch cases where we
don't properly updated the pll state (either in sw or hw). At least
for the shared dpll code the equivalent tricke helped a lot in
catching bugs.

Also rename the function prefix, it's not a generic piece of
infrastructure.

Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c diff | blob | history
Domain: System / Kernel;