drm/amd/display: Compensate for XGMI SS downspread on dprefclk
authorLeo Li <sunpeng.li@amd.com>
Thu, 1 Nov 2018 15:10:18 +0000 (11:10 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 14 Jan 2019 20:04:41 +0000 (15:04 -0500)
commit508f5fcb54f0ad3b333a835f45e109feb9edf761
treedbcd50971d2258e2e0133eda1d696dfb201edf6a
parent09f609c34fc8b9cb560947ab11609259f5d42889
drm/amd/display: Compensate for XGMI SS downspread on dprefclk

[Why]
When XGMI is enabled, we need to adjust the dprefclk according to the
WAFL link's spread spectrum info. This is for VG20 (DCE121) only.

[How]
dce_clk_mgr already stores SS info, currently being used by audio clock.
Therefore, patch the clk_mgr's SS info with the xGMI SS info, if xGMI
is enabled. For display clock, adjust it during dce12_update_clocks()
before calling set_clock().

Since we rely on a mmhub register to reliably determine if xGMI is
enabled, the patching step needs to happen after resource_construct()
has initialized the hardware sequencer.

Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.h
drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c
drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.h
drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c