[RISCV] Made v(f)(w)red* pseudoinstructions SEW-aware
authorNitin John Raj <nitin.raj@sifive.com>
Wed, 29 Mar 2023 00:46:16 +0000 (17:46 -0700)
committerNitin John Raj <nitin.raj@sifive.com>
Wed, 29 Mar 2023 17:37:56 +0000 (10:37 -0700)
commit50876630b910ebd8af14dd5ae6abc48185c365d0
tree96baf2a95715f9fb4fea38b0c0253748f75e345e
parent5bb826d569ccd80e28aedd682db39b8cddd44e53
[RISCV] Made v(f)(w)red* pseudoinstructions SEW-aware

Differential Revision: https://reviews.llvm.org/D147098
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
llvm/test/CodeGen/RISCV/rvv/vmv-copy.mir
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir