drm/amd/display: dcn32/321 dsc_pg_control not executed properly
authorHersen Wu <hersenxs.wu@amd.com>
Thu, 9 Feb 2023 23:35:00 +0000 (18:35 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 28 Feb 2023 19:29:36 +0000 (14:29 -0500)
commit504d3cae8b6718ab9c2fbef9e4cb56deb29ea9ee
tree3de0b8d73787e6822f9b11ce170881b3055c6e98
parenta06d565b4a1c032ff8a8d22ceb39c061443208d9
drm/amd/display: dcn32/321 dsc_pg_control not executed properly

[why]
during boot up or resume from s3, hw default value of
domain_power_forceon is 1. when program domain_power_gate
to 1 to power down hw block, hw will not change to power
off due to domain_power_forceon = 1.

[how]
enable_power_gating_plane(true) should be executed to set
domain_power_forceon to 0 before dsc_pg_control.
dsc_pg_control is already called by dcn3x_init_hw-->
init_pipes--> dsc_pg_control. no need be programmed with
dcn3x_init_hw one more time.
to trigger dchub, dsc block power state change, need
program dc_ip_request_cntl to notify hw block.

Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c