drm/i915/dsc: Fix PPS register definition macros for 2nd VDSC engine
authorManasi Navare <manasi.d.navare@intel.com>
Fri, 24 Aug 2018 01:48:07 +0000 (18:48 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 4 Sep 2018 04:31:36 +0000 (21:31 -0700)
commit4fe967912ee83048beb45a6b4f0f6774fddcfa0a
tree316ff2474970146746a948e8295d86c319498a66
parent399334708b4f07b107094e5db4a390f0f25d2d4f
drm/i915/dsc: Fix PPS register definition macros for 2nd VDSC engine

This patch fixes the PPS4 and PPS5 register definition macros that were
resulting into an incorect MMIO address.

Fixes: 2efbb2f099fb ("i915/dp/dsc: Add DSC PPS register definitions")
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180824014807.14681-1-manasi.d.navare@intel.com
(cherry picked from commit 5df52391ddbed869c7d67b00fbb013bd64334115)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/i915/i915_reg.h