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[x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage
authorMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 31 Oct 2016 09:37:59 +0000 (09:37 +0000)
committerMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 31 Oct 2016 09:37:59 +0000 (09:37 +0000)
commit4fe34fa2ecbf21468e67c3d643c0d7ab1792f8dc
tree84171d03b63b115d93348bf4c61ade4a9e0a2baetree | snapshot
parent3565c96d865438c34bc6dfe85622171e62bb29d7commit | diff
[x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usage

Commit on behalf of mharoush

After LGTM and check all:
This patch enables usage of k registers in inline assembly syntax.

Reviewer: 1. rnk
          2. delena

Differential Revision: https://reviews.llvm.org/D25011

llvm-svn: 285555
clang/lib/Basic/Targets.cpp diff | blob | history
clang/test/CodeGen/avx512-inline-asm-kregisters-basics.c [new file with mode: 0644] blob
Domain: System / Toolchain;