author | Igor Breger <igor.breger@intel.com> | |
Wed, 19 Apr 2017 11:34:59 +0000 (11:34 +0000) | ||
committer | Igor Breger <igor.breger@intel.com> | |
Wed, 19 Apr 2017 11:34:59 +0000 (11:34 +0000) | ||
commit | 4fdf1e489ca5f9750a775e650fc1e5e42c8d400f | |
tree | 53270670bbb9cb3cbebed9ad1fc972923eaf126a | tree | snapshot |
parent | 151cc0a15b20d1a56cb2a8a3629b534b4c3bb53b | commit | diff |
llvm/lib/Target/X86/X86InstructionSelector.cpp | diff | blob | history | |
llvm/lib/Target/X86/X86RegisterBankInfo.cpp | diff | blob | history | |
llvm/test/CodeGen/X86/GlobalISel/X86-regbankselect.mir | diff | blob | history | |
llvm/test/CodeGen/X86/GlobalISel/legalize-trunc.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/X86/GlobalISel/select-trunc.mir | [new file with mode: 0644] | blob |
llvm/test/CodeGen/X86/GlobalISel/trunc.ll | [new file with mode: 0644] | blob |