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arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2}
authorBiju Das <biju.das.jz@bp.renesas.com>
Thu, 3 Mar 2022 16:41:54 +0000 (16:41 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 4 Apr 2022 09:06:55 +0000 (11:06 +0200)
commit4fa1edc83b2b2b467ed47bd682c7beab81a38ef5
tree51219648576000c01f9a8e8186f88422942dc284tree | snapshot
parent0a7c1c888a0c0276837f2cd7190683474a136506commit | diff
arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2}

Enable i2c{0,1} on RZ/G2LC SMARC EVK by deleting respective
entries from board dts and adding pincontrol entries to the
soc-pinctrl dtsi. Also enable i2c2 by adding to soc dtsi.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a07g044c2-smarc.dts diff | blob | history
arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi diff | blob | history
arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi diff | blob | history
Domain: System / Kernel;