lib: sbi: Handle the case where MTVAL has illegal instruction address
authorAnup Patel <anup.patel@wdc.com>
Sat, 15 Aug 2020 16:47:58 +0000 (22:17 +0530)
committerAnup Patel <anup@brainfault.org>
Fri, 21 Aug 2020 14:05:31 +0000 (19:35 +0530)
commit4f3bad6e43f0e5a1a124847edf910e309ae9d59a
tree369be374aa21a7c2c77eee0e6feecdd8461a2d9c
parente435ba05248a10a5085858c46fe11854373d5dbc
lib: sbi: Handle the case where MTVAL has illegal instruction address

The Kendryte K210 follows RISC-V v1.9 spec so MTVAL has instruction
address (instead of instruction encoding) on illegal instruction trap.

To handle above case, we fix sbi_illegal_insn_handler() without any
impact on RISC-V v1.10 (or higher) systems. This achieved by exploiting
the fact that program counter (and instruction address) is always 2-byte
aligned in RISC-V world.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
lib/sbi/sbi_illegal_insn.c