gallivm: special case TGSI_OPCODE_STORE
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Tue, 9 Feb 2016 18:02:34 +0000 (13:02 -0500)
committerNicolai Hähnle <nicolai.haehnle@amd.com>
Wed, 9 Mar 2016 16:39:55 +0000 (11:39 -0500)
commit4eb416bd9d670f55fe9691bcd75950f728a0b782
tree58397c6e0fd9b93c97c7c0e86320061298740e95
parent10b2b584ee6018ad3ae8ee5c494a02705a906957
gallivm: special case TGSI_OPCODE_STORE

This instruction has the resource (buffer or image) as a destination to
represent the writemask for SSBO writes. However, this is obviously not
a "real" destination for the purpose of emitting LLVM IR.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/auxiliary/gallivm/lp_bld_tgsi.c