drm/i915: eDP link training optimization
authorMika Kahola <mika.kahola@intel.com>
Wed, 29 Apr 2015 06:17:39 +0000 (09:17 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 8 May 2015 11:03:26 +0000 (13:03 +0200)
commit4e96c97742f4201edf1b0f8e1b1b6b2ac6ff33e7
tree059d6131a483610d0d36a8bc4e20d1b153073bfe
parent3ef62342bd854fff5d792d67fc6a8e66f26c862b
drm/i915: eDP link training optimization

This is a first of series patches that optimize DP link
training. The first patch is for eDP only where we reuse
the previously trained link training values from cache
i.e. voltage swing and pre-emphasis levels.

In case we are not able to train the link by reusing
the known values, the link training parameters are set
to zero and training is restarted.

V2:
- flag that indicates if DP link is trained and valid
  renamed from 'link_trained' to 'train_set_valid'
- removed routine 'intel_dp_reuse_link_train'

V3:
- rebased against the latest drm-intel-nightly

V4:
- removed HPD long pulse handling for eDP case to clear the
  flag that indicates to reuse the current link training
  parameters. (based on Sivakumar's comment)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
[danvet: s/DP/eDP/ in subject to make scope clear.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h