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(parent: 1d1de74) | patch
[RISCV] Consolidate a bit of common logic for forming reductions
authorPhilip Reames <preames@rivosinc.com>
Fri, 9 Dec 2022 16:17:44 +0000 (08:17 -0800)
committerPhilip Reames <listmail@philipreames.com>
Fri, 9 Dec 2022 16:18:51 +0000 (08:18 -0800)
commit4e5b3f63075b03597a0ae5de894a7d181e3444f3
tree202d39e339d1803981f70013c66b95236b35d188tree | snapshot
parent1d1de7467c32d52926ca56b9167a2c65c451ecfacommit | diff
[RISCV] Consolidate a bit of common logic for forming reductions

There's several patches in flght which change this code, better to only have one copy.

The VP case is left seperate for the moment as the result value type differs.
llvm/lib/Target/RISCV/RISCVISelLowering.cpp diff | blob | history
Domain: System / Toolchain;