[X86] combineVectorShiftImm - fold (shift (logic X, C2), C1) -> (logic (shift X,...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 29 Mar 2023 16:04:17 +0000 (17:04 +0100)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Thu, 30 Mar 2023 11:47:27 +0000 (12:47 +0100)
commit4e21140465caad9bf666e02a2396b2acb961e313
treebcbf2ae03155cbe4084d9bec090c8e5fbdc57bf8
parent83546221af43ca347f8e1b1197a9df54810244e0
[X86] combineVectorShiftImm - fold (shift (logic X, C2), C1) -> (logic (shift X, C1), (shift C2, C1))

Helps expose a number of cases that we could/should reassociate - if only the vector constants hadn't already been lowered :(

It also forms a number of additional VPTERNLOG nodes, bringing together logic ops that had been stuck on either side of a shift op
16 files changed:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/combine-rotates.ll
llvm/test/CodeGen/X86/combine-sdiv.ll
llvm/test/CodeGen/X86/combine-shl.ll
llvm/test/CodeGen/X86/combine-srl.ll
llvm/test/CodeGen/X86/dpbusd_i4.ll
llvm/test/CodeGen/X86/funnel-shift-rot.ll
llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
llvm/test/CodeGen/X86/shrink-const.ll
llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
llvm/test/CodeGen/X86/vector-rotate-128.ll
llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll