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(parent: 13907f4) | patch
RISC-V: Add vssra.vx C API tests
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Fri, 10 Feb 2023 06:27:38 +0000 (14:27 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Sun, 12 Feb 2023 10:31:41 +0000 (18:31 +0800)
commit4e00937ec3eedb68b76babf60b56a1a4a58277a1
treec0b987a4c4be629461e70837954b36dea634f49ftree | snapshot
parent13907f4bd2eba88229c83bef3daee13734df83b0commit | diff
RISC-V: Add vssra.vx C API tests

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vssra_vx-1.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx-2.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx-3.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_m-1.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_m-2.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_m-3.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vssra_vx_tumu-3.c: New test.
18 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_m-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_m-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_m-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_mu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_mu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_mu-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_tu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_tu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_tu-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_tum-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_tum-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_tum-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_tumu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_tumu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vssra_vx_tumu-3.c [new file with mode: 0644] blob
Domain: System / Toolchain;