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(parent: e1289d6) | patch
intel/compiler: Adjust fence message lengths for new register width on Xe2+
authorRohan Garg <rohan.garg@intel.com>
Fri, 22 Jul 2022 11:33:17 +0000 (13:33 +0200)
committerJordan Justen <jordan.l.justen@intel.com>
Thu, 21 Sep 2023 00:19:36 +0000 (17:19 -0700)
commit4de065f6a25aa8e4532b28a1f2fd3070627098d8
treead7d6aa30f051f45d4b5876856f89c23501dc360tree | snapshot
parente1289d613580a13c295686d464e84a422a09b60acommit | diff
intel/compiler: Adjust fence message lengths for new register width on Xe2+

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>
src/intel/compiler/brw_eu_emit.c diff | blob | history
Domain: Graphics System / GL;