Define store instructions with base+register offset addressing mode
authorJyotsna Verma <jverma@codeaurora.org>
Tue, 4 Dec 2012 21:58:25 +0000 (21:58 +0000)
committerJyotsna Verma <jverma@codeaurora.org>
Tue, 4 Dec 2012 21:58:25 +0000 (21:58 +0000)
commit4da904c8f8e1bf7abbe3f530c05a462981526718
treefcf5177d1379a2931d180b32d7c8676ddb9e3810
parent7e07b14d0b1c64bfc2e72d7a677c240f1382cbce
Define store instructions with base+register offset addressing mode
using multiclass.

llvm-svn: 169314
llvm/lib/Target/Hexagon/HexagonInstrInfoV4.td