arm64: add Cortex-A53 cache errata workaround
authorAndre Przywara <andre.przywara@arm.com>
Fri, 24 Apr 2015 17:30:48 +0000 (10:30 -0700)
committerSasha Levin <sasha.levin@oracle.com>
Mon, 27 Apr 2015 21:13:45 +0000 (17:13 -0400)
commit4d817d3de61d2697e40ae4c69d23aeaf919319d2
tree2dc4af2f7ea63f2fc0c9f7fff02b46b4db2197c3
parentda767e54e365f4816ffbbf1403e5f7735d363bc3
arm64: add Cortex-A53 cache errata workaround

The ARM errata 819472, 826319, 827319 and 824069 define the same
workaround for these hardware issues in certain Cortex-A53 parts.
Use the new alternatives framework and the CPU MIDR detection to
patch "cache clean" into "cache clean and invalidate" instructions if
an affected CPU is detected at runtime.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[will: add __maybe_unused to squash gcc warning]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: <stable@vger.kernel.org> # v3.18.y
(cherry picked from commit 301bcfac42897dbd1b0b3c1be49f24654a1bc49e)
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
arch/arm64/include/asm/alternative-asm.h
arch/arm64/include/asm/cpufeature.h
arch/arm64/include/asm/cputype.h
arch/arm64/kernel/cpu_errata.c
arch/arm64/mm/cache.S