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[X86][AVX] Add plausible schedule classes to MASKPAIR/VP2INTERSECT/VDPBF16PS instructions
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 13 Nov 2019 11:58:19 +0000 (11:58 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 13 Nov 2019 12:02:01 +0000 (12:02 +0000)
commit4d0e7b628a82fb81f833a6221abfa88f82029ea5
treecf1fc3bf8134070ab654c4cb0a9c6dde4c47ea78tree | snapshot
parentfd9fa9995cdafa526543df466d762a982863a906commit | diff
[X86][AVX] Add plausible schedule classes to MASKPAIR/VP2INTERSECT/VDPBF16PS instructions

These are really just placeholders that use approximately the right resources - once we have CPUs scheduler models that support these instructions they will need revisiting.

In the meantime this means that all instructions have a class of some kind., meaning models can be more easily flagged as complete.
llvm/lib/Target/X86/X86InstrAVX512.td diff | blob | history
Domain: System / Toolchain;