target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 25 Aug 2015 14:45:07 +0000 (15:45 +0100)
commit4cfb8ad896a6f85953038bd913ce3d82d347013d
tree431a69482b3c61f9e6361ed570cf0a99ec80a101
parent137805f5d8504933faa4fe129cdab88f2695a8c2
target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers

Add the AArch64 registers MAIR_EL3 and TPIDR_EL3, which are the only
two which we had implemented the 32-bit Secure equivalents of but
not the 64-bit Secure versions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1438281398-18746-2-git-send-email-peter.maydell@linaro.org
target-arm/helper.c