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author	Suneel Garapati <sgarapati@marvell.com>
	Sun, 20 Oct 2019 00:10:20 +0000 (17:10 -0700)
committer	Stefan Roese <sr@denx.de>
	Tue, 25 Aug 2020 06:01:16 +0000 (08:01 +0200)
commit	4cf56ec07f673f99c87862dbb7e72bc077685474
tree	d40e8b752e61d666aab70f047b008e6ef30634c3	tree \| snapshot
parent	bc30140d20d041a6ed5d52175e9953c36f8f5473	commit \| diff

pci: pci-uclass: Add multi entry support for memory regions

Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>

Domain: System / Kernel;

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arch/sandbox/dts/test.dts		diff \| blob \| history
configs/sandbox_defconfig		diff \| blob \| history
configs/sandbox_flattree_defconfig		diff \| blob \| history
drivers/pci/Kconfig		diff \| blob \| history
drivers/pci/pci-uclass.c		diff \| blob \| history
test/dm/pci.c		diff \| blob \| history