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(parent: 4c9eb0f) | patch
[SelectionDAG] allow FP binops in SimplifyDemandedVectorElts
authorSanjay Patel <spatel@rotateright.com>
Mon, 15 Oct 2018 18:05:34 +0000 (18:05 +0000)
committerSanjay Patel <spatel@rotateright.com>
Mon, 15 Oct 2018 18:05:34 +0000 (18:05 +0000)
commit4cf1da0e021bbd05665e8dbc7eebb94a5f1ea461
tree99b69a862b411ccdda88867a301886f916a8f39ctree | snapshot
parent4c9eb0fac4ee9e9a5dba13ea5b4bff3bfe4b2c12commit | diff
[SelectionDAG] allow FP binops in SimplifyDemandedVectorElts

This is intended to make the backend on par with functionality that was
added to the IR version of SimplifyDemandedVectorElts in:
rL343727
...and the original motivation is that we need to improve demanded-vector-elements
in several ways to avoid problems that would be exposed in D51553.

Differential Revision: https://reviews.llvm.org/D52912

llvm-svn: 344541
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp diff | blob | history
llvm/test/CodeGen/X86/avx512-hadd-hsub.ll diff | blob | history
llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll diff | blob | history
llvm/test/CodeGen/X86/vector-shuffle-combining.ll diff | blob | history
Domain: System / Toolchain;