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[Clang][SVE] Permit specific predicate-as-counter registers in inline assembly
authorDavid Sherwood <david.sherwood@arm.com>
Mon, 24 Jul 2023 12:34:42 +0000 (12:34 +0000)
committerDavid Sherwood <david.sherwood@arm.com>
Tue, 25 Jul 2023 08:55:45 +0000 (08:55 +0000)
commit4cf11d8a65dfded59761ec52804a86277b9c0036
tree00f0dc0a8890ed93f3d3bb525b097b20aa530129tree | snapshot
parent86da763ab6ed19c58349d3f6f62d4bb52becab2ccommit | diff
[Clang][SVE] Permit specific predicate-as-counter registers in inline assembly

This patch adds the predicate-as-counter registers pn0-pn15 to the
list of supported registers used when writing inline assembly.

Tests added to

  clang/test/CodeGen/aarch64-sve-inline-asm.c

Differential Revision: https://reviews.llvm.org/D156115
clang/lib/Basic/Targets/AArch64.cpp diff | blob | history
clang/test/CodeGen/aarch64-sve-inline-asm.c diff | blob | history
Domain: System / Toolchain;