Merge tags 'spi-nor/for-5.11' and 'nand/for-5.11' into mtd/next

Merge tags 'spi-nor/for-5.11' and 'nand/for-5.11' into mtd/next

SPI NOR core changes:

- Initial support for stateful Octal DTR mode using volatile settings
- Preliminary support for JEDEC 251 (xSPI) and JEDEC 216D standards
- Support for Cypress Semper flash
- Support to specify ECC block size of SPI NOR flashes
- Fixes to avoid clearing of non-volatile Block Protection bits at probe

Generic NAND core:
* ECC management:
  - Add an I/O request tweaking mechanism
  - Entire rework of the software BCH ECC driver, creation of a real
    ECC engine, getting rid of raw NAND structures, migration to more
    generic prototypes, misc fixes and style cleanup. Moved now to the
    Generic NAND layer.
  - Entire rework of the software Hamming ECC driver, creation of a
    real ECC engine, getting rid of raw NAND structures, misc renames,
    comment updates, cleanup, and style fixes. Moved now to the
    generic NAND layer.
  - Necessary plumbing at the NAND level to retrieve generic NAND ECC
    engines (softwares and on-die).
  - Update of the bindings.

Raw NAND core:
* Geting rid of the chip->ecc.priv entry.
* Fix miscellaneous typos in kernel-doc

Raw NAND controller drivers:
* AU1550: Ensure the presence of the right includes
* Davinci: Do not use extra dereferencing
* GPMI:
  - Fix the driver only sense CS0 R/B issue
  - Fix the random DMA timeout issue
  - Use a single line for of_device_id
  - Use of_device_get_match_data()
  - Fix reference count leak in gpmi ops
  - Cleanup makefile
  - Fix binding matching of clocks on different SoCs
* Ingenic: remove redundant get_device() in ingenic_ecc_get()
* Intel LGM: New NAND controller driver
* Marvell: Drop useless line
* Meson:
  - Fix a resource leak in init
  - Fix meson_nfc_dma_buffer_release() arguments
* mxc:
  - Use device_get_match_data()
  - Use a single line for of_device_id
  - Remove platform data support
* Qcom:
  - Add support for SDX55
  - Support for IPQ6018 QPIC NAND controller
  - Fix DMA sync on FLASH_STATUS register read
* Rockchip: New NAND controller driver for RK3308, RK2928 and others
* Sunxi: Add MDMA support

SPI-NAND core:
* Creation of a SPI-NAND on-die ECC engine
* Move ECC related definitions earlier in the driver
* Fix typo in comment
* Fill a default ECC provider/algorithm
* Remove outdated comment
* Fix OOB read
* Allow the case where there is no ECC engine
* Use the external ECC engine logic

SPI-NAND chip drivers:
* Micron:
  - Add support for MT29F2G01AAAED
  - Use more specific names
* Macronix:
  - Add support for MX35LFxG24AD
  - Add support for MX35LFxGE4AD

Others:
* onenand: Use mtd->oops_panic_write as condition
* plat-ram: correctly free memory on error path in platram_probe()