riscv: tlbflush: remove confusing comment on local_flush_tlb_all()
authorPaul Walmsley <paul.walmsley@sifive.com>
Thu, 10 Oct 2019 22:57:58 +0000 (15:57 -0700)
committerPaul Walmsley <paul.walmsley@sifive.com>
Mon, 14 Oct 2019 19:35:36 +0000 (12:35 -0700)
commit4c8eb19cf9dc5fcc489757acbf93be90baf25848
treee0c65f24364f91e5e363e6ac3b568871041711cc
parent2993c9b04e616df0848b655d7202a707a70fc876
riscv: tlbflush: remove confusing comment on local_flush_tlb_all()

Remove a confusing comment on our local_flush_tlb_all()
implementation.  Per an internal discussion with Andrew, while it's
true that the fence.i is not necessary, it's not the case that an
sfence.vma implies a fence.i.  We also drop the section about
"flush[ing] the entire local TLB" to better align with the language in
section 4.2.1 "Supervisor Memory-Management Fence Instruction" of the
RISC-V Privileged Specification v20190608.

Fixes: c901e45a999a1 ("RISC-V: `sfence.vma` orderes the instruction cache")
Reported-by: Alan Kao <alankao@andestech.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Andrew Waterman <andrew@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
arch/riscv/include/asm/tlbflush.h