tests: tweak MIR for ARM tests to correct MI issues
authorSaleem Abdulrasool <compnerd@compnerd.org>
Tue, 26 Apr 2016 17:54:21 +0000 (17:54 +0000)
committerSaleem Abdulrasool <compnerd@compnerd.org>
Tue, 26 Apr 2016 17:54:21 +0000 (17:54 +0000)
commit4c6c4e2bbb00f8c2e8e5b1377bdd1bcad2be1996
tree59c77a6c6de328e2b4bb3898eefac0822fc2e01f
parent601e029ba39eb097b5c6b7689f7e84a3532f6cbf
tests: tweak MIR for ARM tests to correct MI issues

The Machine Instruction Verifier flagged some issues in the serialized MIR.
Adjust the input to correct them.

Fixes the remaining portion of PR27480.

llvm-svn: 267578
llvm/test/CodeGen/MIR/ARM/ARMLoadStoreDBG.mir
llvm/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir