PCI: designware: Simplify dw_pcie_cfg_read/write() interfaces
authorGabriele Paoloni <gabriele.paoloni@huawei.com>
Thu, 8 Oct 2015 19:27:48 +0000 (14:27 -0500)
committerBjorn Helgaas <bhelgaas@google.com>
Mon, 2 Nov 2015 20:48:45 +0000 (14:48 -0600)
commit4c45852f494dab827291c656ee9e12f3f4ee64d6
tree9cd03214cccebdd4cfcb72411d26b2d8b1c99245
parentc003ca99632e1783466f459033874a0e1e31457b
PCI: designware: Simplify dw_pcie_cfg_read/write() interfaces

Callers of dw_pcie_cfg_read() and dw_pcie_cfg_write() previously had to
split the address into "addr" and "where".  The callees assumed "addr" was
32-bit aligned (with zeros in the low two bits) and they used only the low
two bits of "where".

Accept the entire address in "addr" and drop the now-redundant "where"
argument.  As an example, this replaces this:

  int dw_pcie_cfg_read(void __iomem *addr, int where, int size, u32 *val)
    *val = readb(addr + (where & 1));

with this:

  int dw_pcie_cfg_read(void __iomem *addr, int size, u32 *val)
    *val = readb(addr):

[bhelgaas: changelog, split access size change to separate patch]
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/host/pci-exynos.c
drivers/pci/host/pci-keystone-dw.c
drivers/pci/host/pcie-designware.c
drivers/pci/host/pcie-designware.h
drivers/pci/host/pcie-spear13xx.c