vf610twr: Fix typo in DRAM init
authorAnthony Felice <tony.felice@timesys.com>
Fri, 9 Oct 2015 20:38:39 +0000 (16:38 -0400)
committerTom Rini <trini@konsulko.com>
Fri, 16 Oct 2015 11:21:09 +0000 (07:21 -0400)
commit4b8cdd484c51bb05b47cc83c634ba4a4043aa997
treefb97ab8c3ef8d2fd317b20036298910fdef88b6c
parenta7e2c6f6bb0b28d5b7f08bf407742fc3fddf701b
vf610twr: Fix typo in DRAM init

This commit fixes a typo in vf610twr DRAM init that was causing a hang in
U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc
(vf610: refactor DDRMC code).

Signed-off-by: Anthony Felice <tony.felice@timesys.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
board/freescale/vf610twr/vf610twr.c