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(parent: 25ea6a1) | patch
[ARM64] Fix a bug in shuffle vector lowering to generate corect vext ISD with swapped...
authorJiangning Liu <jiangning.liu@arm.com>
Fri, 23 May 2014 02:54:50 +0000 (02:54 +0000)
committerJiangning Liu <jiangning.liu@arm.com>
Fri, 23 May 2014 02:54:50 +0000 (02:54 +0000)
commit4b5b757d652c5b7179f7b5673ac19a45aaae91ff
treef24ab1c7aa00c0c9e0b09cecb5597b75409c4b5dtree | snapshot
parent25ea6a1b8e58fd956b7cc439f027b8849441842dcommit | diff
[ARM64] Fix a bug in shuffle vector lowering to generate corect vext ISD with swapped input vectors.

llvm-svn: 209495
llvm/lib/Target/ARM64/ARM64ISelLowering.cpp diff | blob | history
llvm/test/CodeGen/ARM64/vext_reverse.ll [new file with mode: 0644] blob
Domain: System / Toolchain;