AMDGPU: Don't run indexing mode switches with exec = 0
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 2 Jun 2020 13:22:40 +0000 (09:22 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 2 Jun 2020 17:47:48 +0000 (13:47 -0400)
commit4b1f6cdbf930b0a47fab334431dca0b964614b19
tree75be7ee45c85886b250eb67765af3d237cf0aeb7
parent452e0d9023ca9a747a3646a42cea13d66b689de7
AMDGPU: Don't run indexing mode switches with exec = 0

Add mode defs rather than special casing this like some of the other
instructions.
llvm/lib/Target/AMDGPU/SOPInstructions.td
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-gpr-idx-mode.mir [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir