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[RISCV] Fix typo in RISCVSchedSiFive7.td
authorAlexander Pivovarov <apivovarov@gmail.com>
Wed, 1 Sep 2021 21:26:51 +0000 (16:26 -0500)
committerEvandro Menezes <evandro.menezes@sifive.com>
Wed, 1 Sep 2021 21:39:48 +0000 (16:39 -0500)
commit4b04d54206a5b7f549af9a2f0a9588ee8e933eb2
tree8d54c10c0556051fe6b91e19a6568468c07492edtree | snapshot
parent49476a4d66b3c46af3d3c750e9def21f93da52bccommit | diff
[RISCV] Fix typo in RISCVSchedSiFive7.td

Fix typo in "microarchitecure".

Differential Revision: https://reviews.llvm.org/D109006
llvm/lib/Target/RISCV/RISCVSchedSiFive7.td diff | blob | history
Domain: System / Toolchain;