[RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.
authorJonas Paulsson <paulsson@linux.vnet.ibm.com>
Fri, 10 Nov 2017 08:46:26 +0000 (08:46 +0000)
committerJonas Paulsson <paulsson@linux.vnet.ibm.com>
Fri, 10 Nov 2017 08:46:26 +0000 (08:46 +0000)
commit4b017e682d7bc7ce9412f0653e862447be086545
treeba6a0f08f565acdb536d32dd604e2a4303966e89
parent1a0da2db5f341a44490c6825fdf98717224e5024
[RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.

* The method getRegAllocationHints() is now of bool type instead of void. If
true is returned, regalloc (AllocationOrder) will *only* try to allocate the
hints, as opposed to merely trying them before non-hinted registers.

* TargetRegisterInfo::getRegAllocationHints() is implemented for SystemZ with
an increase in number of LOCRs.

In this case, it is desired to force the hints even though there is a slight
increase in spilling, because if a non-hinted register would be allocated,
the LOCRMux pseudo would have to be expanded with a jump sequence. The LOCR
(Load On Condition) SystemZ instruction must have both operands in either the
low or high part of the 64 bit register.

Reviewers: Quentin Colombet and Ulrich Weigand
https://reviews.llvm.org/D36795

llvm-svn: 317879
llvm/include/llvm/Target/TargetRegisterInfo.h
llvm/lib/CodeGen/AllocationOrder.cpp
llvm/lib/CodeGen/AllocationOrder.h
llvm/lib/CodeGen/TargetRegisterInfo.cpp
llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
llvm/test/CodeGen/SystemZ/cond-move-04.mir [new file with mode: 0644]