cxl: Increase timeout for detection of AFU mmio hang
authorFrederic Barrat <fbarrat@linux.vnet.ibm.com>
Tue, 19 Apr 2016 16:34:24 +0000 (18:34 +0200)
committerMichael Ellerman <mpe@ellerman.id.au>
Fri, 22 Apr 2016 11:45:50 +0000 (21:45 +1000)
commit4aec6ec0da9c72c0fa1a5b0d1133707481347bb3
treeea21bd18bfaa947d1163389a5896a2c3a6f68aca
parente009a7e858fed215cb4eed5174a31cadd42d8797
cxl: Increase timeout for detection of AFU mmio hang

PSL designers recommend a larger value for the mmio hang pulse, 256 us
instead of 1 us. The CAIA architecture states that it needs to be
smaller than 1/2 of the RTOS timeout set in the PHB for outbound
non-posted transactions, which is still (easily) the case here.

Signed-off-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Acked-by: Ian Munsie <imunsie@au1.ibm.com>
Tested-by: Frank Haverkamp <haver@linux.vnet.ibm.com>
Tested-by: Manoj Kumar <manoj@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
drivers/misc/cxl/pci.c