arm64/crypto: issue aese/aesmc instructions in pairs
authorArd Biesheuvel <ard.biesheuvel@linaro.org>
Tue, 17 Mar 2015 18:05:13 +0000 (18:05 +0000)
committerWill Deacon <will.deacon@arm.com>
Thu, 19 Mar 2015 10:43:57 +0000 (10:43 +0000)
commit4a97abd44329bf7b9c57f020224da5f823c9c9ea
tree7c22535e94706459719f71071113c57897de4bad
parentb63dbef93f91d56cb4385fdd8d1765201d451136
arm64/crypto: issue aese/aesmc instructions in pairs

This changes the AES core transform implementations to issue aese/aesmc
(and aesd/aesimc) in pairs. This enables a micro-architectural optimization
in recent Cortex-A5x cores that improves performance by 50-90%.

Measured performance in cycles per byte (Cortex-A57):

                CBC enc         CBC dec         CTR
  before        3.64            1.34            1.32
  after         1.95            0.85            0.93

Note that this results in a ~5% performance decrease for older cores.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/crypto/aes-ce-ccm-core.S
arch/arm64/crypto/aes-ce.S