[AArch64][SVE] Implement floating-point conversion intrinsics
authorKerry McLaughlin <kerry.mclaughlin@arm.com>
Tue, 26 Nov 2019 10:21:20 +0000 (10:21 +0000)
committerKerry McLaughlin <kerry.mclaughlin@arm.com>
Tue, 26 Nov 2019 10:31:47 +0000 (10:31 +0000)
commit4a649ad21aa282d08f90ae655369235c2aaf5ad5
tree708af87592d37cc5a7e0841203f94fe839bc99a2
parent28166816b05aebb3154e5f8a28b3ef447cce8471
[AArch64][SVE] Implement floating-point conversion intrinsics

Summary:
Adds intrinsics for the following:
  - fcvt
  - fcvtzs & fcvtzu
  - scvtf & ucvtf
  - fcvtlt, fcvtnt
  - fcvtx & fcvtxnt

Reviewers: huntergr, sdesmalen, dancgr, mgudim, efriedma

Reviewed By: sdesmalen

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cameron.mcinally, cfe-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70180
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/CodeGen/AArch64/sve-intrinsics-fp-converts.ll [new file with mode: 0644]
llvm/test/CodeGen/AArch64/sve2-intrinsics-fp-converts.ll [new file with mode: 0644]