iommu: arm-smmu: disable large page mappings for Nvidia arm-smmu
authorAshish Mhetre <amhetre@nvidia.com>
Thu, 21 Apr 2022 08:15:04 +0000 (13:45 +0530)
committerWill Deacon <will@kernel.org>
Fri, 22 Apr 2022 10:21:30 +0000 (11:21 +0100)
commit4a25f2ea0e030b2fc852c4059a50181bfc5b2f57
treea23a2ff0707c3f9d94b2c1da2bb9bf6511b02831
parent95d4782c34a60800ccf91d9f0703137d4367a2fc
iommu: arm-smmu: disable large page mappings for Nvidia arm-smmu

Tegra194 and Tegra234 SoCs have the erratum that causes walk cache
entries to not be invalidated correctly. The problem is that the walk
cache index generated for IOVA is not same across translation and
invalidation requests. This is leading to page faults when PMD entry is
released during unmap and populated with new PTE table during subsequent
map request. Disabling large page mappings avoids the release of PMD
entry and avoid translations seeing stale PMD entry in walk cache.
Fix this by limiting the page mappings to PAGE_SIZE for Tegra194 and
Tegra234 devices. This is recommended fix from Tegra hardware design
team.

Acked-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Co-developed-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Link: https://lore.kernel.org/r/20220421081504.24678-1-amhetre@nvidia.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/iommu/arm/arm-smmu/arm-smmu-nvidia.c