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dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root Port
authorBharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Tue, 5 Jul 2022 10:56:45 +0000 (16:26 +0530)
committerBjorn Helgaas <bhelgaas@google.com>
Fri, 22 Jul 2022 19:12:00 +0000 (14:12 -0500)
commit49f40703ca91c8428dd35e7331ae6c098e61b100
tree3fe5e407cc19e489aa3b01dd8483f6ef771598eetree | snapshot
parentf2906aa863381afb0015a9eb7fefad885d4e5a56commit | diff
dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root Port

Xilinx Versal Premium series has CPM5 block which supports Root Port
functionality at Gen5 speed.

Add support for YAML schemas documentation for Versal CPM5 Root Port driver.

Link: https://lore.kernel.org/r/20220705105646.16980-2-bharat.kumar.gogada@xilinx.com
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml diff | blob | history
Domain: System / Kernel;