RISC-V: Add sscofpmf extension support
authorAtish Patra <atish.patra@wdc.com>
Sat, 19 Feb 2022 00:46:58 +0000 (16:46 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Mon, 21 Mar 2022 22:01:09 +0000 (15:01 -0700)
commit4905ec2fb7e6421c14c9fb7276f5aa92f60f2b98
treecf945df15c4ac3604682bad5a2247141d6af7ade
parente9991434596f5373dfd75857b445eb92a9253c56
RISC-V: Add sscofpmf extension support

The sscofpmf extension allows counter overflow and filtering for
programmable counters. Enable the perf driver to handle the overflow
interrupt. The overflow interrupt is a hart local interrupt.
Thus, per cpu overflow interrupts are setup as a child under the root
INTC irq domain.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/csr.h
arch/riscv/include/asm/hwcap.h
arch/riscv/kernel/cpu.c
arch/riscv/kernel/cpufeature.c
drivers/perf/riscv_pmu_sbi.c
include/linux/perf/riscv_pmu.h